版本
3.5-517
分支
FIFO-BP
发布于
11 years, 2 months ago
Windows x64 Windows x86 Mac OS X
提交(Commit)
3874b46a9311cf9ef2430c3c8b0b5264cbbe8dda
修改者
skidau
修改说明
Used an immediate GenerateDSPInterrupt when transferring data from ARAM to MRAM and a scheduled DSP interrupt when transferring data from MRAM to ARAM. Changed the maximum timeslice back to 20000 as it was causing slowdown.